Jens Schleusner

Jens Schleusner

Embedded Systems · Computer Vision · System Architecture · job@schleusner.dev


Skills

Hardware-Software Co-Design Expert
  • Mapping of algorithms to SoC platforms
  • Embedded realtime systems
  • Hardware acceleration
  • Performance optimisation
System Architecture
  • Embedded Linux
  • Realtime GPU rendering with KMS/DRM
  • Automotive Ethernet
  • gPTP time synchronisation
Measurement and Prototyping
  • Implementation of embedded prototypes and demonstrators
  • Measurement and evaluation
  • Timing analysis
  • Power analysis

Open Source Projects

t41-ptp

The Arduino compatible t41-ptp library provides high precision time synchronization for the Teensy 4.1 microcontroller platform.
t41-ptp

realtime-offset

The realtime-offset Linux kernel module provides the offset between clock_monotonic and clock_realtime via a device interface.
realtime-offset

Tiny Tapeout 2 - German Traffic Light State Machine

Tiny Tapeout is an educational project that makes it easy to get digital designs manufactured on a real chip. Project 12 is a state machine that generates signals for vehicle and pedestrian traffic lights at an intersection of a main street and a side street. A blinking yellow light for the side street is generated in the reset state.

Adventskranz

The Adventskranz repository provides a header-only C++ library to calculate the number of burning candles on an Advent wreath for any given date.
Adventskranz

Pixelblaze Sunrise

The Pixelblaze Sunrise repository provides a realtime sunrise implementation for the Pixelblaze RGBW-LED controller in JavaScript.
PixelblazeSunrise

Publications

PTP-Synchronized Tri-Level Sync Generation for Networked Multi-Sensor Systems

Riggers, C.; Schleusner, J.; Renke, O.; Blume, H. (2024)
IEEE 30th International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA)

Synchronization of sensor devices is crucial for concurrent data acquisition. Numerous protocols have emerged for this task, and for some multi-sensor setups to operate synchronized, a conversion between deployed protocols is needed. This paper presents a bare-metal implementation of a Tri- Level Sync signal generator on a microcontroller unit (MCU) synchronized to a master clock via the IEEE 1588 Precision Time Protocol (PTP). Cameras can be synchronized by locking their frame generators to the Tri-Level Sync signal. As this synchronization depends on a stable analog signal, a careful design of the signal generation based on a PTP-managed clock is required. The limited tolerance of a camera to clock frequency adjustments for continuous operations imposes rate-limits on the PTP-controller. Simulations using a software model demonstrate the resulting controller instabilities from rate-limiting. This problem is addressed by introducing a linear prediction mode to the controller, which estimates the realizable offset change during rate-limited frequency alignment. By adjusting the frequency in a timely manner, a large overshoot of the controller can be avoided. Additionally, a cascading controller design that decouples the PTP from the clock update rate proved to be advantageous to increase the camera’s tolerable frequency change. This paper demonstrates that a MCU is a viable platform to perform PTP-synchronized Tri-Level Sync generation. Our open source implementation is available for use by the research community.

Ethernet-based lighting-architecture: Image stabilization for high-resolution light functions

Pfleiderer, R.; Schleusner, J.; Blume, H.; Kreipe, B.; Lampe, S.; Speh, J. (2024)
Automotive Ethernet Congress (AEC)

Single pair Ethernet in combination with Ethernet endpoints provides a scalable basis for the direct control of sensors and actuators in zonal vehicle networks. As recently shown, this approach is also ideal for driving high-resolution light functions. The ability to transmit different parallel data streams to actuators opens a wide field for new applications. Here, we show a method for stabilising high-resolution light projections in driving operation. The stabilization of the light image is based on an inertial measurement unit that records vehicle movements in real-time. An algorithm in a central control unit continuously calculates correction values for the position and distortion compensation of the light distribution and sends this data to the lamp via Ethernet, preferably 10BASE-T1S. Two methods are combined in a proof of concept: predictive correction with video data rate and image shifting in the headlamp’s frame buffer at high frequency.

Sub-Microsecond Time Synchronization for Network-Connected Microcontrollers

Schleusner, J.; Fahnemann, C.; Pfleiderer, R.; Blume, H. (2024)
IEEE International Conference on Consumer Electronics (ICCE)
Sub-Microsecond Time Synchronization Figure
Figure: Illustration of timing synchronization

This paper presents a bare-metal implementation of the IEEE 1588 Precision Time Protocol (PTP) for network-connected microcontroller edge devices, enabling sub-microsecond time synchronization in automotive networks and multimedia applications. The implementation leverages the hardware timestamping capabilities of the microcontroller (MCU) to implement a two-stage Phase-locked loop (PLL) for offset and drift correction of the hardware clock. Using the MCU platform as a PTP master enables the distribution of a sub-microsecond accurate Global Positioning System (GPS) timing signal over a network. The performance of the system is evaluated using master-slave configurations where the platform is synchronized with a GPS, an embedded platform, and a microcontroller master. Results show that MCU platforms can be synchronized to an external GPS reference over a network with a standard deviation of 40.7 nanoseconds, enabling precise time synchronization for bare-metal microcontroller systems in various applications.

Synthetic Aperture Radar Algorithms on Transport Triggered Architecture Processors using OpenCL

Rother, N.; Mätzner, L.; Jääskeläinen, P.; Leppänen, T.; Schleusner, J.; Blume, H. (2023)
IEEE International Radar Conference (RADAR)

Dynamic Model-Based Safety Margins for High-Density Matrix Headlight Systems

Schleusner, J.; Blume, H.; Lampe, S. (2023)
IEEE Transactions on Intelligent Transportation Systems
Model-Based Safety Margins Figure
Figure: Dynamic Model-Based Safety Margins for High-Density Matrix Headlight Systems

Real-time masking of vehicles in a dynamic road environment is a demanding task for adaptive driving beam systems of modern headlights. Next-generation high-density matrix headlights enable precise, high-resolution projections, while advanced driver assistance systems enable detection and tracking of objects with high update rates and low-latency estimation of the pose of the ego-vehicle. Accurate motion tracking and precise coverage of the masked vehicles are necessary to avoid glare while maintaining a high light throughput for good visibility. Safety margins are added around the mask to mitigate glare and flicker caused by the update rate and latency of the system. We provide a model to estimate the effects of spatial and temporal sampling on the safety margins for high- and low-density headlight resolutions and different update rates. The vertical motion of the ego-vehicle is simulated based on a dynamic model of a vehicle suspension system to model the impact of the motion-to-photon latency on the mask. Using our model, we evaluate the light throughput of an actual matrix headlight for the relevant corner cases of dynamic masking scenarios depending on pixel density, update rate, and system latency. We apply the masks provided by our model to a high beam light distribution to calculate the loss of luminous flux and compare the results to a light throughput approximation technique from the literature.

Deep Learning Based Classification of Pedestrian Vulnerability Trained on Synthetic Datasets

Schleusner, J.; Neu, L.; Behmann, N.; Blume, H. (2019)
IEEE 9th International Conference on Consumer Electronics (ICCE-Berlin)
Pedestrian vulnerability Figure
Figure: Deep Learning Based Classification of Pedestrian Vulnerabilities

The reliable detection of vulnerable road users and the assessment of the actual vulnerability is an important task for the collision warning algorithms of driver assistance systems. Current systems make assumptions about the road geometry which can lead to misclassification. We propose a deep learning-based approach to reliably detect pedestrians and classify their vulnerability based on the traffic area they are walking in. Since there are no pre-labeled datasets available for this task, we developed a method to train a network first on custom synthetic data and then use the network to augment a customer-provided training dataset for a neural network working on real world images. The evaluation shows that our network is able to accurately classify the vulnerability of pedestrians in complex real world scenarios without making assumptions on road geometry.

Probabilistic 3D Point Cloud Fusion on Graphics Processors for Automotive (Poster)

Behmann, N.; Cheng, Y.; Schleusner, J.; Blume, H. (2019)
International Conference on Information Fusion (FUSION), Ottawa

Design and Evaluation of a TTA-based ASIP for the Extraction of SIFT-Features

Schleusner, J. (2016)
Master Thesis
TTA-based ASIP Figure
Figure: TTA-based ASIP for the Extraction of SIFT-Features
ims.uni-hannover.de

Design and Implementation of Digital Sensor Interfaces for a High Temperature ASIC Demonstration Platform

Schleusner, J. (2014)
Bachelor Thesis
ims.uni-hannover.de

Awards

Best Session Presentation Award

ICCE 2024 CT04-1
Jens Schleusner (Leibniz Universität Hannover, Germany), Sub-Microsecond Time Synchronization for Network-Connected Microcontrollers
icce.org

Experience

Research Engineer

Leibniz University Hannover

Low-latency realtime video signal processing algorithms on embedded hardware platforms for high resolution LED-Matrix headlight systems. Our adaptive headlights prevent glare for drivers and pedestrians while increasing visibility and safety for nighttime driving.

March 2017 - Present

Research Exchange

Tampere University of Technology

Development of an Application Specific Instructionset Processor (ASIP) for computer vision applications like SIFT Feature extraction. We chose a wide horizontal datalevel parallelisation strategy with 1024 bits to enable pipelined processing of HD-images at high framerates.

October 2016

Internship

Robert Bosch GmbH

Design Space exploration for FPGA-based hardware accelerators for object detection algorithms based on neural networks. Embedded Linux drivers for efficient DMA datatransfers over AXI4 on an FPGA-based SoC.

October 2015 - March 2016

Education

Leibniz University Hannover

Study towards Doctor of Engineering
Electrical Engineering · Microelectronics
March 2017 - Present

Leibniz University Hannover

Master of Science
Electrical Engineering · Microelectronics
October 2014 - December 2016

Leibniz University Hannover

Bachelor of Science
Computer Engineering
October 2011 - September 2014


Impressum

Impressum